000			00692nam a22002297a 4500
999			_c114625 _d114625
005			20200804100119.0
008			200730b ||||| |||| 00| 0 eng d
020			_a978-93-530-6201-9
041			_aEN
082			_223 _a621.392 _bMAN
100			_aMano, M. Morris
100			_aCiletti, Michael D.
245			_a Digital design: with an introductional to the verilog HDL, VHDL and systemverilog _c /M.Morris Mano, Michael D.Ciletti
250			_a6th ed.
260			_aChennai _bPearson Education _c2018
300			_a765 p.
500			_a Includes index.
509			_aNS
650			_93834 _aComputer system analysis and design
650		4	_94843 _aDigital design
942			_cR