| 000 -LEADER |
|---|
| fixed length control field |
00579nam a22002057a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20191107151115.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
191107b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
013200643x |
| 041 ## - LANGUAGE |
|---|
| Language of text/sound track |
English |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| DDC Edition number |
23 |
| Classification number |
621.38173 |
| Author Mark |
DES |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
Design of MOS VLSI circuits for telecommunications |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Englewood |
| Name of publisher, distributor, etc. |
Prentice-Hall |
| Date of publication, distribution, etc. |
1985 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xiv, 620 p. |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Includes references and index. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| 9 (RLIN) |
98010 |
| Topical term or geographic name entry element |
VLSI electronics |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| 9 (RLIN) |
97988 |
| Personal name |
Tsividis, Yannis |
| Role |
Editor |
| 700 ## - ADDED ENTRY--PERSONAL NAME |
|---|
| 9 (RLIN) |
98012 |
| Personal name |
Antognetti, Paolo |
| Role |
Editor |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| item type |
Books in Stacks (S) |
